📰 Proceedings - International Symposium on Computer Architecture/Proceedings 2023: all accepted papers

84 papers · the most cited first · ← Proceedings - International Symposium on Computer Architecture/Proceedings 2023

1. TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for EmbeddingsNorman Paul Jouppi, George Kurian, Sheng Li et al.508 citations · our summary
2. OliVe: Accelerating Large Language Models via Hardware-friendly Outlier-Victim Pair Quantization ↗Cong Guo, Jiaming Tang, Weiming Hu et al.152 citations
3. FACT: FFN-Attention Co-optimized Transformer Architecture with Eager Correlation Prediction ↗Yubin Qin, Yang Wang, Dazheng Deng et al.116 citations
4. SHARP: A Short-Word Hierarchical Accelerator for Robust and Practical Fully Homomorphic Encryption ↗Jongmin Kim, Sangpyo Kim, Jaewan Choi et al.112 citations
5. Instant-3D: Instant Neural Radiance Field Training Towards On-Device AR/VR 3D Reconstruction ↗Sixu Li, Chaojian Li, Wenbo Zhu et al.79 citations
6. RowPress: Amplifying Read Disturbance in Modern DRAM Chips ↗Haocong Luo, Ataberk Olgun, A. Giray Yağlıkçı et al.74 citations
7. Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators ↗Jingwei Cai, Yuchen Wei, Zuotong Wu et al.66 citations
8. With Shared Microexponents, A Little Shifting Goes a Long Way ↗Bita Darvish Rouhani, Ritchie Zhao, Venmugil Elango et al.54 citations
9. MTIA: First Generation Silicon Targeting Meta's Recommendation Systems ↗Amin Firoozshahian, Joel Coburn, Roman Levenstein et al.53 citations
10. Understanding and Mitigating Hardware Failures in Deep Learning Training Systems ↗Yi He, Mike Hutton, Steven Chan et al.53 citations
11. NeuRex: A Case for Neural Rendering Acceleration ↗Junseo Lee, Kwanseok Choi, Jungi Lee et al.49 citations
12. Astrea: Accurate Quantum Error-Decoding via Practical Minimum-Weight Perfect-Matching ↗Suhas Vittal, Poulami Das, Moinuddin K. Qureshi47 citations
13. RAELLA: Reforming the Arithmetic for Efficient, Low-Resolution, and Low-Loss Analog PIM: No Retraining Required! ↗Tanner Andrulis, Joel Emer, Vivienne Sze46 citations
14. Spy in the GPU-box: Covert and Side Channel Attacks on Multi-GPU Systems ↗Sankha Baran Dutta, Hoda Naghibijouybari, Arjun K. Gupta et al.42 citations
15. MXFaaS: Resource Sharing in Serverless Environments for Parallelism and Efficiency ↗Jovan Stojkovic, Tianyin Xu, Hubertus Franke et al.39 citations
16. MetaNMP: Leveraging Cartesian-Like Product to Accelerate HGNNs with Near-Memory Processing ↗Dan Chen, Haiheng He, Hai Jin et al.36 citations
17. Gen-NeRF: Efficient and Generalizable Neural Radiance Fields via Algorithm-Hardware Co-Design ↗Yonggan Fu, Zhifan Ye, Jiayi Yuan et al.34 citations
18. Accelerating Personalized Recommendation with Cross-level Near-Memory Processing ↗Haifeng Liu, Long Zheng, Yu Huang et al.31 citations
19. Hardware Acceleration of Neural Graphics ↗Muhammad Husnain Mubarik, Ramakrishna Kanungo, Tobias Zirr et al.30 citations
20. MapZero: Mapping for Coarse-grained Reconfigurable Architectures with Reinforcement Learning and Monte-Carlo Tree Search ↗Xiangyu Kong, Yi Cheng Huang, Jianfeng Zhu et al.30 citations
21. Profiling Hyperscale Big Data Processing ↗Abraham Gonzalez, Aasheesh Kolli, Samira Khan et al.30 citations
22. Scaling Qubit Readout with Hardware Efficient Machine Learning Architectures ↗Satvik Maurya, Chaithanya Naik Mude, William D. Oliver et al.30 citations
23. Venice: Improving Solid-State Drive Parallelism at Low Cost via Conflict-Free Accesses ↗Rakesh Nadig, Mohammad Sadrosadati, Haiyu Mao et al.29 citations
24. EdgePC: Efficient Deep Learning Analytics for Point Clouds on Edge Devices ↗Ziyu Ying, Sandeepa Bhuyan, Yan Kang et al.28 citations
25. LeCA: In-Sensor Learned Compressive Acquisition for Efficient Machine Vision on the Edge ↗Tianrui Ma, Adith Boloor, Xiangxing Yang et al.27 citations
26. SPADE: A Flexible and Scalable Accelerator for SpMM and SDDMM ↗Gerasimos Gerogiannis, Şerif Yeşil, Damitha Lenadora et al.27 citations
27. CDPU: Co-designing Compression and Decompression Processing Units for Hyperscale Systems ↗Sagar Karandikar, Aniruddha N. Udipi, Junsun Choi et al.26 citations
28. Contiguitas: The Pursuit of Physical Memory Contiguity in Datacenters ↗Kaiyang Zhao, Kaiwen Xue, Ziqi Wang et al.26 citations
29. Optimizing CPU Performance for Recommendation Systems At-Scale ↗Rishabh Jain, S. H. Cheng, Vishwas Kalagi et al.26 citations
30. RoboShape: Using Topology Patterns to Scalably and Flexibly Deploy Accelerators Across Robots ↗Sabrina M. Neuman, Radhika Ghosal, Thomas Bourgeat et al.24 citations
31. Write-Light Cache for Energy Harvesting Systems ↗Jongouk Choi, Jianping Zeng, Dongyoon Lee et al.24 citations
32. HAAC: A Hardware-Software Co-Design to Accelerate Garbled Circuits ↗Jianqiao Mo, Jayanth Gopinath, Brandon Reagen23 citations
33. Pensieve: Microarchitectural Modeling for Security Evaluation ↗Yuheng Yang, Thomas Bourgeat, Stella Lau et al.23 citations
34. Clifford-based Circuit Cutting for Quantum Simulation ↗Kaitlin N. Smith, Michael A. Perlin, Pranav Gokhale et al.22 citations
35. V10: Hardware-Assisted NPU Multi-tenancy for Improved Resource Utilization and Fairness ↗Yuqi Xue, Yiqi Liu, Lifeng Nai et al.22 citations
36. OneQ: A Compilation Framework for Photonic One-Way Quantum Computation ↗Hezi Zhang, Anbang Wu, Yuke Wang et al.20 citations
37. GenDP: A Framework of Dynamic Programming Acceleration for Genome Sequencing Analysis ↗Yufeng Gu, Arun Karthi Subramaniyan, Tim Dunn et al.19 citations
38. RoSÉ: A Hardware-Software Co-Simulation Infrastructure Enabling Pre-Silicon Full-Stack Robotics SoC Evaluation ↗Dima Nikiforov, S. Dong, Chengyi Lux Zhang et al.18 citations
39. SAC: Sharing-Aware Caching in Multi-Chip GPUs ↗Shiqing Zhang, Mahmood Naderan-Tahan, Magnus Jahre et al.18 citations
40. CAMJ: Enabling System-Level Energy Modeling and Architectural Exploration for In-Sensor Visual Computing ↗Tianrui Ma, Yu Feng, Xuan Zhang et al.17 citations
41. ECSSD: Hardware/Data Layout Co-Designed In-Storage-Computing Architecture for Extreme Classification ↗S.F. Li, Fengbin Tu, Liu Liu et al.17 citations
42. EMISSARY: Enhanced Miss Awareness Replacement Policy for L2 Instruction Caching ↗Nayana Prasad Nagendra, Bhargav Reddy Godala, Ishita Chaturvedi et al.17 citations
43. Implicit Memory Tagging: No-Overhead Memory Safety Using Alias-Free Tagged ECC ↗Michael B. Sullivan, Mohamed Tarek Ibn Ziad, Aamer Jaleel et al.17 citations
44. Architecting Efficient Multi-modal AIoT Systems ↗Xiaofeng Hou, Jiacheng Liu, Xuehan Tang et al.16 citations
45. FDMAX: An Elastic Accelerator Architecture for Solving Partial Differential Equations ↗Jiajun Li, Yuxuan Zhang, Hao Zheng et al.16 citations
46. On Endurance of Processing in (Nonvolatile) Memory ↗Salonik Resch, Hüsrev Cılasun, Zamshed I. Chowdhury et al.16 citations
47. μManycore: A Cloud-Native CPU for Tail at Scale ↗Jovan Stojkovic, Chunao Liu, Muhammad Shahbaz et al.16 citations
48. Metior: A Comprehensive Model to Evaluate Obfuscating Side-Channel Defense Schemes ↗Peter W. Deutsch, Weon Taek Na, Thomas Bourgeat et al.15 citations
49. SmartDS: Middle-Tier-centric SmartNIC Enabling Application-aware Message Split for Disaggregated Block Storage ↗Jie Zhang, Hongjing Huang, Lingjun Zhu et al.15 citations
50. TaskFusion: An Efficient Transfer Learning Architecture with Dual Delta Sparsity for Multi-Task Natural Language Processing ↗Zichen Fan, Qirui Zhang, Pierre Abillama et al.15 citations
51. Energy-Efficient Realtime Motion Planning ↗Deval Shah, Ningfeng Yang, Tor M. Aamodt14 citations
52. QIsim: Architecting 10+K Qubit QC Interfaces Toward Quantum Supremacy ↗Dongmoon Min, Junpyo Kim, Junhyuk Choi et al.14 citations
53. SCALO: An Accelerator-Rich Distributed System for Scalable Brain-Computer Interfacing ↗Karthik Sriram, Raghavendra Pradyumna Pothukuchi, Michal Gerasimiuk et al.14 citations
54. ArchGym: An Open-Source Gymnasium for Machine Learning Assisted Architecture Design ↗Srivatsan Krishnan, Amir Yazdanbakhsh, Shvetank Prakash et al.13 citations
55. ImaGen: A General Framework for Generating Memory- and Power-Efficient Image Processing Accelerators ↗Nisarg Ujjainkar, Jingwen Leng, Yuhao Zhu13 citations
56. K-D Bonsai: ISA-Extensions to Compress K-D Trees for Autonomous Driving Tasks ↗Pedro Henrique Exenberger Becker, José-María Arnau, Antonio M. González13 citations
57. Q-BEEP: Quantum Bayesian Error Mitigation Employing Poisson Modeling over the Hamming Spectrum ↗Samuel Stein, Nathan Wiebe, Yufei Ding et al.13 citations
58. All Your PC Are Belong to Us: Exploiting Non-control-Transfer Instruction BTB Updates for Dynamic PC Extraction ↗Jiyong Yu, Trent Jaeger, Christopher W. Fletcher12 citations
59. Dancing the Quantum Waltz: Compiling Three-Qubit Gates on Four Level Architectures ↗Andrew Litteken, Lennart Maximilian Seifert, Jason D. Chadwick et al.12 citations
60. ETTE: Efficient Tensor-Train-based Computing Engine for Deep Neural Networks ↗Yu Dian Gong, Miao Yin, Lingyi Huang et al.12 citations
61. Supply Chain Aware Computer Architecture ↗August Ning, Georgios Tziantzioulis, David Wentzlaff12 citations
62. TEA: Time-Proportional Event Analysis ↗Björn Gottschall, Lieven Eeckhout, Magnus Jahre11 citations
63. A Research Retrospective on AMD's Exascale Computing Journey ↗Gabriel H. Loh, Michael Schulte, Mike Ignatowski et al.10 citations
64. Decoupled SSD: Rethinking SSD Architecture through Network-based Flash Controllers ↗Jiho Kim, Myoungsoo Jung, John Kim10 citations
65. Enabling High Performance Debugging for Variational Quantum Algorithms using Compressed Sensing ↗Tianyi Hao, Kun Liu, Swamit Tannu10 citations
66. Flumen: Dynamic Processing in the Photonic Interconnect ↗Kyle Shiflett, Avinash Karanth, Răzvan Bunescu et al.10 citations
67. DRAM Translation Layer: Software-Transparent DRAM Power Savings for Disaggregated Memory ↗Wenjing Jin, Wonsuk Jang, Haneul Park et al.9 citations
68. Doppelganger Loads: A Safe, Complexity-Effective Optimization for Secure Speculation Schemes ↗Amund Bergland Kvalsvik, Pavlos Aimoniotis, Stefanos Kaxiras et al.9 citations
69. ISA-Grid: Architecture of Fine-grained Privilege Control for Instructions and Registers ↗Shulin Fan, Zhichao Hua, Yubin Xia et al.9 citations
70. Mystique: Enabling Accurate and Scalable Generation of Production AI Benchmarks ↗Mingyu Liang, Wenyin Fu, Louis Feng et al.9 citations
71. R2D2: Removing ReDunDancy Utilizing Linearity of Address Generation in GPUs ↗Dongho Ha, Yunho Oh, Won Woo Ro9 citations
72. RSQP: Problem-specific Architectural Customization for Accelerated Convex Quadratic Optimization ↗Maolin Wang, Ian McInerney, Bartolomeo Stellato et al.9 citations
73. F4T: A Fast and Flexible FPGA-based Full-stack TCP Acceleration Framework ↗Junehyuk Boo, Yujin Chung, Eunjin Baek et al.8 citations
74. LAORAM: A Look Ahead ORAM Architecture for Training Large Embedding Tables ↗Rachit Rajat, Yongqin Wang, Murali Annavaram8 citations
75. Nimblock: Scheduling for Fine-grained FPGA Sharing through Virtualization ↗Meghna Mandava, Paul Reckamp, Deming Chen7 citations
76. TEESec: Pre-Silicon Vulnerability Discovery for Trusted Execution Environments ↗Moein Ghaniyoun, Kristin Barber, Yuan Ming Xiao et al.6 citations
77. DynAMO: Improving Parallelism Through Dynamic Placement of Atomic Memory Operations ↗Vı́ctor Soria-Pardos, Adrià Armejach, Tiago Mück et al.5 citations
78. Shogun: A Task Scheduling Framework for Graph Mining Accelerators ↗Yibo Wu, Jianfeng Zhu, Wenrui Wei et al.5 citations
79. Imprecise Store Exceptions ↗Siddharth Gupta, Yuanlong Li, Qingxuan Kang et al.4 citations
80. An Algorithm and Architecture Co-design for Accelerating Smart Contracts in Blockchain ↗Rui Pan, Chubo Liu, Guoqing Xiao et al.3 citations
81. Parallel Driving for Fast Quantum Computing Under Speed Limits ↗Evan McKinney, Chao Zhou, Mingkang Xia et al.3 citations
82. MESA: Microarchitecture Extensions for Spatial Architecture Generation ↗Dong Kai Wang, Jiaqi Lou, Naiyin Jin et al.2 citations
83. Orinoco: Ordered Issue and Unordered Commit with Non-Collapsible Queues ↗Dibei Chen, Tairan Zhang, Yi Cheng Huang et al.1 citation
84. Programmable Olfactory Computing ↗Nathaniel Bleier, Abigail Wezelis, Lav R. Varshney et al.1 citation

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